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DG417/dg418/dg419 improved, spst/spdt analog switches ________________________________________________________________ maxim integrated products 1 call toll free 1-800-998-8800 for free samples or literature. 19-0114; rev 1; 3/94 _______________general description maxim? redesigned DG417/dg418/dg419 precision, cmos, monolithic analog switches now feature guar- anteed on-resistance matching (3 max) between switches and guaranteed on-resistance flatness over the signal range (4 max). these switches conduct equally well in either direction and guarantee low charge injection, low power consumption, and an esd tolerance of 2000v minimum per method 3015.7. the new design offers low off leakage current over temper- ature (less than 5na at +85?). the DG417/dg418 are single-pole/single-throw (spst) switches. the DG417 is normally closed, and the dg418 is normally open. the dg419 is single- pole/double-throw (spdt) with one normally closed switch and one normally open switch. switching times are less than 175ns max for t on and less than 145ns max for t off . operation is from a single +10v to +30v supply, or bipolar ?.5v to ?0v supplies. the improved DG417/dg418/dg419 are fabricated with a 44v silicon-gate process. ________________________applications sample-and-hold circuits communications systems test equipment battery-operated systems modems fax machines guidance and control systems pbx, pabx audio signal routing military radios ______________________new features ? plug-in upgrades for industry-standard DG417/dg418/dg419 ? improved r ds(on) match between channels (3 max - dg419 only) ? guaranteed r flat(on) over signal range (4 max) ? improved charge injection (10pc max) ? improved off leakage current over temperature (<5na at +85?) ? withstand electrostatic discharge (2000v min) per method 3015.7 __________________existing features ? low r ds(on) (35 max) ? single-supply operation +10v to +30v bipolar-supply operation 4.5v to 20v ? low power consumption (35? max) ? rail-to-rail signal handling ? ttl/cmos-logic compatible ______________ordering information ordering information continued at end of data sheet. * contact factory for dice specifications. _____________________pin configurations/functional diagrams/truth tables top view 1 2 3 4 8 7 6 5 d v- in v l v+ gnd n.c. s dg418 dip/so 1 2 3 4 8 7 6 5 d v- in v l v+ gnd n.c. s DG417 dip/so 1 2 3 4 8 7 6 5 s2 v- in v l v+ gnd s1 d dg419 dip/so logic switch 0 1 on off switches shown for logic "0" input logic switch 0 1 off on logic switch 1 0 1 on off switch 2 off on DG417 dg418 dg419 n.c. = no internal connection part temp. range pin-package DG417 cj 0? to +70? 8 plastic dip DG417cy 0? to +70? 8 so DG417c/d 0? to +70? dice* DG417dj -40? to +85? 8 plastic dip DG417dy -40? to +85? 8 so
DG417/dg418/dg419 improved, spst/spdt analog switches 2 _______________________________________________________________________________________ stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings voltage referenced to v- v+ .......................................................................................44v gnd....................................................................................25v v l ....................................................(gnd -0.3v) to (v+ +0.3v) digital inputs v s , v d (note 1).........(v- -2v) to (v+ +2v) or 30ma (whichever occurs first) continuous current (any terminal) (note 1) ........................30ma peak current, s or d (pulsed at 1ms, 10% duty cycle max) ..100ma continuous power dissipation (t a = +70?) 8-pin plastic dip (derate 9.09mw/? above +70?) ....727mw 8-pin so (derate 5.88mw/? above +70?).................471mw 8-pin cerdip (derate 8.00mw/? above +70?..).......640mw operating temperature ranges dg41_c_ .............................................................0? to +70? dg41_d_ ..........................................................-40? to +85? dg41_ak ........................................................-55? to +125? storage temperature range .............................-65? to +150? lead temperature (soldering, 10sec) .............................+300? electrical characteristics?ual supplies (v+ = 15v, v- = -15v, v l = 5v, gnd = 0v, v inl = 0.8v, v inh = 2.4v, t a = t min to t max , unless otherwise noted.) parameter symbol min typ max (note 2) units r flat(on) 6 on-resistance flatness (note 4) 4 on-resistance match between channels (note 4) d r ds(on) 3 45 -0.25 0.25 -5 5 -0.25 0.1 0.25 -5 5 analog signal range v analog -15 15 v 20 30 conditions v+ = 15v, v- = -15v, v d = ?v, i s = -10ma 4 (note 3) v+ = 13.5v, v- = -13.5v, v d = ?0v, i s = -10ma t a = +25? v+ = 15v, v- = -15v, v d = ?0v, i s = -10ma source-off leakage current (note 5) i s(off) na -10 10 t a = t min to t max t a = +25? c, d a t a = +25? c, d t a = t min to t max a -10 10 na t a = t min to t max t a = +25? c, d a -0.75 -0.1 0.75 -20 20 drain-off leakage current (note 5) -10 10 i d(off) v+ = 16.5v, v- = -16.5v, v d = ?5.5v, v s = 15.5v v+ = 16.5v, v- = -16.5v, v d = ?5.5v, v s = 15.5v dg419 DG417 dg418 a t a = t min to t max t a = +25? t a = t min to t max t a = +25? t a = t min to t max drain-source on-resistance r ds(on) 20 35 c, d t a = t min to t max t a = +25? c, d dg419 a -0.4 0.4 -20 20 t a = t min to t max t a = +25? -10 10 c, d a na -0.75 0.75 -20 20 drain-on leakage current (note 5) -10 10 i d(on) v+ = 16.5v, v- = -16.5v, v d = ?5.5v, v s = ?5.5v DG417 dg418 switch note 1: signals on s, d, or in exceeding v+ or v- are clamped by internal diodes. limit forward current to maximum current ratings.
DG417/dg418/dg419 improved, spst/spdt analog switches _______________________________________________________________________________________ 3 electrical characteristics?ual supplies (continued) (v+ = 15v, v- = -15v, v l = 5v, gnd = 0v, v inl = 0.8v, v inh = 2.4v, t a = t min to t max , unless otherwise noted.) -5 5 t a = t min to t max ? -1 -0.0001 1 i+ positive supply current v+ = 16.5v, v- = -16.5v, v in = 0v or 5v t a = +25? t a = +25? dg419, v s1 = v s2 = ?0v, figure 4 ns 513 t d break-before-make interval t a = t min to t max 250 t a = +25? dg419, v s = ?0v, figure 3 ns 175 t trans transition time t a = t min to t max 210 t a = +25? DG417, dg418, v d = ?0v, figure 2 ns 60 145 t off turn-off time t a = t min to t max 250 t a = +25? DG417, dg418, v d = ?0v, figure 2 ns 100 175 t on turn-on time -5 5 t a = t min to t max ? -1 -0.0001 1 i gnd -5 5 ground current v+ = 16.5v, v- = -16.5v, v in = 0v or 5v t a = +25? t a = t min to t max ? -1 -0.0001 1 i l logic supply current v+ = 16.5v, v- = -16.5v, v in = 0v or 5v t a = +25? -5 5 t a = t min to t max ? -1 -0.0001 1 i- negative supply current v+ = 16.5v, v- = -16.5v, v in = 0v or 5v t a = +25? DG417 dg418 dg419 v s = 0v, f = 1mhz, figure 9 35 pf 30 c d(on) or c s(on) drain/source-on capacitance t a = +25? pf 8 c s(off) source-off capacitance v d = 0v, f = 1mhz, figure 8 t a = +25? pf 8 c d(off) drain-off capacitance v d = 0v, f = 1mhz, figure 8 t a = +25? db 85 crosstalk (note 7) dg419, r l = 50 , c l = 5pf, f = 1mhz, figure 7 t a = +25? db 68 oirr off-isolation rejection ratio (note 6) r l = 50 , c l = 5pf, f = 1mhz, figure 6 t a = +25? t a = +25? v gen = 0v, figure 5 pc 310 q charge injection (note 3) v in = 0.8v ? -0.5 0.005 0.5 i inl logic input current with input voltage low v in = 2.4v conditions ? -0.5 0.005 0.5 i inh logic input current with input voltage high units min typ max (note 2) symbol parameter supply dynamic logic input
DG417/dg418/dg419 improved, spst/spdt analog switches 4 _______________________________________________________________________________________ electrical characteristics?ingle supply (v+ = 12v, v- = 0v, v l = 5v, gnd = 0v, v inh = 2.4v, v inl = 0.8v, t a = +25?, unless otherwise noted.) note 2: typical values are for design aid only , are not guaranteed, and are not subject to production testing. the algebraic convention where the most negative value is a minimum and the most positive value a maximum, is used in this data data sheet. note 3: guaranteed by design. note 4: on-resistance match between channels and flatness are guaranteed only with bipolar-supply operation. flatness is defined as the difference between the maximum and the minimum value of on-resistance as measured at the extremes of the specified analog range. note 5: leakage parameters i s(off) , i d(off) , and i d(on) are 100% tested at the maximum rated hot temperature and guaranteed by correlation at +25?. note 6: off-isolation rejection ratio = 20log (v d /v s ) , v d = output, v s = input to off switch. note 7: between any two switches. parameter symbol min typ max (note 2) units analog signal range v analog 012 v conditions (note 3) drain-source on-resistance r ds(on) 40 100 i s = -10ma, v d = 3.8v, v+ = 10.8v turn-on time t on 110 ns DG417/dg418, v d = 8v, figure 2 break-before-make interval t d 60 ns dg419, r l = 1000 , c l = 35pf, figure 4 turn-off time t off 40 ns DG417/dg418, v d = 8v, figure 2 positive supply current i+ -0.0001 ? charge injection (note 3) q 210 pc c l = 10nf, v gen = 0v, r gen = 0v, figure 5 all channels on or off, v+ = 13.2v, v l = 5.25v, v in = 0v or 5v negative supply current i- -0.0001 ? all channels on or off, v+ = 13.2v, v l = 5.25v, v in = 0v or 5v ground current i gnd -0.0001 ? all channels on or off, v l = 5.25v, v in = 0v or 5v logic supply current i l -0.0001 ? all channels on or off, v l = 5.25v, v in = 0v or 5v switch supply dynamic
DG417/dg418/dg419 improved, spst/spdt analog switches _______________________________________________________________________________________ 5 45 5 -20 -10 10 on-resistance vs. v d and power-supply voltage 15 35 DG417-01 v d (v) r ds(on) ( w ) 020 25 40 10 30 20 50 a b c d a: v+ = 5v, v- = -5v b: v+ = 10v, v- = -10v c: v+ = 15v, v- = -15v d: v+ = 20v, v- = -20v 5 -20 -10 10 on-resistance vs. v d and temperature 30 DG417-02 v d (v) r ds(on) ( w ) 020 20 10 25 15 35 v+ = 15v v- = -15v t a = +125? t a = +85? t a = +25? t a = -55? 20 05 15 on-resistance vs. v d (single supply) 120 DG417-03 v d (v) r ds(on) ( w ) 10 20 80 40 100 60 140 v- = 0v v+ = 5v v+ = 10v v+ = 15v v+ = 20v 10 05 15 on-resistance vs. v d and temperature 60 DG417-04 v d (v) r ds(on) ( w ) 10 20 40 20 50 30 70 v+ = 12v v- = 0v t a = +125? t a = +85? t a = +25? -60 -20 charge injection vs. analog voltage 40 DG417-07 v d (v) q (pc) 020 0 -40 20 -20 60 -15 -10 -5 5 10 15 v+ = 15v v- = -15v 0.0001 -75 off leakage currents vs. temperature 10 DG417-05 temperature (?) off leakage (na) +25 +125 0.1 0.001 1 0.01 100 v+ = 16.5v v- = -16.5v v d = ?5v v s = 15v 0.0001 -75 on leakage currents vs. temperature 10 DG417-06 temperature (?) on leakage (na) +25 +125 0.1 0.001 1 0.01 100 v+ = 16.5v v- = -16.5v v d = ?5v v s = ?5v 0.0001 -75 supply current vs. temperature 10 DG417-08 temperature (?) i+, i-, i l ( m a) +25 +125 0.1 0.001 1 0.01 100 a: i+ at v+ = 16.5v b: i- at v- = -16.5v c: i l at v l = 5v a b c __________________________________________typical operating characteristics (t a = +25?, unless otherwise noted.)
DG417/dg418/dg419 improved, spst/spdt analog switches 6 _______________________________________________________________________________________ _______________________________________________________________________ pin description pin name function DG417 dg418 dg419 1 2 s, s1 analog-switch source terminal (normally closed) 2 2 n.c. no internal connection 3 3 3 gnd logic ground 4 4 4 v+ analog-signal positive supply input 5 5 5 v l logic-level positive supply input 6 6 6 in logic-level input 7 7 7 v- analog-signal negative supply input 8 8 1 d analog-switch drain terminal __________applications information operation with supply voltages other than ?5v using supply voltages other than ?5v will reduce the analog signal range. the DG417/dg418/dg419 switch- es operate with ?.5v to ?0v bipolar supplies or with a +10v to +30v single supply; connect v- to 0v when operating with a single supply. also, all device types can operate with unbalanced supplies such as +24v and -5v. v l must be connected to +5v to be ttl com- patible, or to v+ for cmos-logic level inputs. the typical operating characteristics graphs show typical on-resistance with ?0v, ?5v, ?0v, and ?v sup- plies. (switching times increase by a factor of two or more for operation at ?v.) overvoltage protection proper power-supply sequencing is recommended for all cmos devices. do not exceed the absolute maxi- mum ratings because stresses beyond the listed rat- ings may cause permanent damage to the devices. always sequence v+ on first, followed by v l , v-, and logic inputs. if power-supply sequencing is not possi- ble, add two small, external signal diodes in series with supply pins for overvoltage protection (figure 1). adding diodes reduces the analog signal range to 1v below v+ and 1v above v-, without affecting low switch resistance and low leakage characteristics. device operation is unchanged, and the difference between v+ and v- should not exceed +44v. v+ d v- s v g figure 1. overvoltage protection using external blocking diodes. 1 8 s, s2 analog-switch source terminal (normally open)
DG417/dg418/dg419 improved, spst/spdt analog switches _______________________________________________________________________________________ 7 _____________________________________________________ timing diagrams/test circuits t r < 20ns t f < 20ns 50% 0v logic input v- -15v r l 300 w s gnd c l includes fixture and stray capacitance. v out = v d ( r l ) r l + r ds(on ) switch input in +3v t off 0v d switch output 0.9 x v out 0.9 x v out t on v out switch output logic input logic input waveforms inverted for switches that have the opposite logic sense. v l v+ c l 35pf +5v +15v v out DG417 dg418 t r < 20ns t f < 20ns 50% 0v logic input v- -15v r l 1000 w d gnd c l includes fixture and stray capacitance. logic input s1 in t trans +3v t trans v out1 v+ s2 v out 0.8 x v out1 v out2 0.8 x v out2 switch output v l dg419 +15v +5v c l 35pf figure 2. DG417/dg418 switching time figure 3. dg419 transition time
DG417/dg418/dg419 improved, spst/spdt analog switches 8 _______________________________________________________________________________________ 50% v out1 v out2 0.9 x v out +3v 0v 0v logic input switch output 1 switch output 2 v out 0.9 x v out t d t d logic input v- -15v r l 300 w gnd c l includes fixture and stray capacitance. s2 d in1, in2 v l s1 v out v+ dg419 +5v +15v c l 35pf +10v figure 5. charge injection v gen gnd d c l 10nf v out -15v v- v+ v l v out in off on off d v out q = d v out x c l s +5v in depends on switch configuration; input polarity determined by sense of switch. off on off in v in = +3v DG417 dg418 dg419 +15v figure 4. dg419 break-before-make interval ______________________________________ timing diagrams/test circuits (continued)
DG417/dg418/dg419 improved, spst/spdt analog switches _______________________________________________________________________________________ 9 in 0v or 2.4v signal generator 0dbm +15v 10nf v l network analyzer s1 or s2 r l gnd d 10nf -15v v- v+ +5v DG417 dg418 dg419 signal generator 0dbm +15v v+ s2 r l gnd d v- -15v 0v or 2.4v in s1 50 w v l d dg419 +5v network analyzer 10nf 10nf capacitance meter s d gnd v- -15v in 0v or 2.4v +15v v l +5v f = 1mhz v+ DG417 dg418 dg419 10nf 10nf s d gnd v- -15v in 0v or 2.4v +15v v l +5v v+ DG417 dg418 dg419 capacitance meter f = 1mhz 10nf 10nf figure 6. off-isolation rejection ratio figure 7. dg419 crosstalk figure 8. drain/source-off capacitance figure 9. drain/source-on capacitance ______________________________________ timing diagrams/test circuits (continued)
DG417/dg418/dg419 improved, spst/spdt analog switches 10 ______________________________________________________________________________________ ______________________ chip topography 7 6 4 5 8 9 32 1 0.058" 1.47mm 0.076" 1.93mm __ordering information (continued) transistor count: 32 substrate connected to v+ d n.c. s 9 d d n.c. 8 s s n.c. 7 v- v- v- 6 in in in 5 v l v l v l 4 v+ v+ v+ 3 gnd gnd gnd 2 s n.c. d 1 dg419 dg418 DG417 die pad part temp. range pin-package DG417dk -40? to +85? 8 cerdip DG417ak -55? to +125? 8 cerdip** dg418 cj 0? to +70? 8 plastic dip dg418cy 0? to +70? 8 so dg418c/d 0? to +70? dice* dg418dj -40? to +85? 8 plastic dip dg418dy -40? to +85? 8 so dg418dk -40? to +85? 8 cerdip dg418ak -55? to +125? 8 cerdip** dg419 cj 0? to +70? 8 plastic dip dg419cy 0? to +70? 8 so dg419c/d 0? to +70? dice* dg419dj -40? to +85? 8 plastic dip dg419dy -40? to +85? 8 so dg419dk -40? to +85? 8 cerdip dg419ak -55? to +125? 8 cerdip** * contact factory for dice specifications. **contact factory for availability and processing to mil-std-883b.
DG417/dg418/dg419 improved, spst/spdt analog switches ______________________________________________________________________________________ 11 ________________________________________________________package information c a a2 e1 d e e a e b a3 b1 b dim a a1 a2 a3 b b1 c d d1 e e1 e e a e b l a min ? 0.015 0.125 0.055 0.016 0.050 0.008 0.348 0.005 0.300 0.240 ? 0.115 0? max 0.200 ? 0.175 0.080 0.022 0.065 0.012 0.390 0.035 0.325 0.280 0.400 0.150 15? min ? 0.38 3.18 1.40 0.41 1.27 0.20 8.84 0.13 7.62 6.10 ? 2.92 0? max 5.08 ? 4.45 2.03 0.56 1.65 0.30 9.91 0.89 8.26 7.11 10.16 3.81 15? inches millimeters 2.54 bsc 7.62 bsc 0.100 bsc 0.300 bsc a1 l d1 e 21-324a a 8-pin plastic dual-in-line package l dim a a1 b c d e e h h l a min 0.053 0.004 0.014 0.007 0.189 0.150 0.228 0.010 0.016 0? max 0.069 0.010 0.019 0.010 0.197 0.157 0.244 0.020 0.050 8? min 1.35 0.10 0.35 0.19 4.80 3.80 5.80 0.25 0.40 0? max 1.75 0.25 0.49 0.25 5.00 4.00 6.20 0.50 1.27 8? inches millimeters a 8-pin plastic small-outline package h e d e a a1 c h x 45? 0.127mm 0.004in. b 1.27 bsc 0.050 bsc 21-325a
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 1994 maxim integrated products printed usa is a registered trademark of maxim integrated products. DG417/dg418/dg419 improved, spst/spdt analog switches ___________________________________________package information (continued) c a d b1 b dim a b b1 b2 c d e e1 e l l1 q s s1 a min ? 0.014 0.038 0.023 0.008 ? 0.220 0.290 0.125 0.150 0.015 ? 0.005 0? max 0.200 0.023 0.065 0.045 0.015 0.405 0.310 0.320 0.200 ? 0.060 0.055 15? min ? 0.36 0.97 0.58 0.20 ? 5.59 7.37 3.18 3.81 0.38 ? 0.13 0? max 5.08 0.58 1.65 1.14 0.38 10.29 7.87 8.13 5.08 ? 1.52 1.40 15? inches millimeters q l s1 e 21-326d 8-pin ceramic dual-in-line package a s l1 e e1 2.54 bsc 0.100 bsc b2

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